Training digital ASIC/FPGA design

Training digital ASIC/FPGA design

The amount of software in products around us is increasing. Even apparently simple products like an electric razor contains several processors and hundreds or thousands lines of software code.In particular for embedded systems. The borders between Software and Hardware are fading away. This means that software engineers get more and more involved with hardware design processes. Soft Wired Hardware components like ASIC and FPGA play often an important role.

Software engineers need knowledge about ASIC and FPGA design methodologies to close the gap between Hardware and Software.

The main objective of this training is the relation between hardware and software design. Software engineers will get a global insight about the different facets and methodologies of ASIC/FPGA design. 

Syllabus

  • IntroductionDesign Flows
  • Hardware Description Language
  • Introduction System Verilog
  • VHDL
  • Verilog
  • Logic Synthesis
  • Functional Verification
  • FPGA Technology
  • System-on-Chip Design and Verification
  • ASIC Test
  • Assertion Based Verification
  • Static Timing Analysis
  • ASIC Technology
  • ASIC Power Consumption
  • Controlling the ASIC design process

Duration
3 days

Audience 
Software engineers

For more information please contact Niek ten Hove, +31 (0)74 265 0050

Download the full brochure

Download the training brochure