Training professional VHDL
This 3 day training is meant as an introduction into VHDL. VHDL, as it seems, only knows advantages, but the complexity of VHDL can be very frustrating for new users: why is my description doing different things than I intended?
Mr. B. Molenkamp will make sure you will have enough experience to understand most VHDL descriptions and to describe small problems in VHDL yourself. This training is meant for designers of digital systems.
During the training, theory and practice will be interchangeable. Besides VHDL aspects (like simulation model, entity, architecture, package, configuration) also design of digital systems in VHDL and synthesis of VHDL will come up for discussion. The training is aimed at the IEEE standard, not at a specific VHDL tool. During practice you will work with another participant. During practice different tools can be used. If a training is held on site, tools will be used which the trainee will use after the training.
A digital design background and preferably some programming experience in C or another language.
The training has been given by B. Molenkamp, teacher at the faculty Electrical engineering, Mathematics and Informatics of the Universiteit Twente. He is a VHDL trainer at Dizain-Sync B.V. since 1989.
The training will take 3 days.
Training center of Dizain-Sync, Borne. On-site courses is on request.